Type
Text
Type
Dissertation
Advisor
De Geronimo, Gianluigi | Stanacevic, Milutin | Salman, Emre | Radeka, Veljko.
Date
2015-12-01
Keywords
Cryogenic Electronics, Front-end ASIC, Hot Carrier Effect, LAr TPC, Lifetime Projection, Low Frequency Noise | Electrical engineering
Department
Department of Electrical Engineering.
Language
en_US
Source
This work is sponsored by the Stony Brook University Graduate School in compliance with the requirements for completion of degree.
Identifier
http://hdl.handle.net/11401/77479
Publisher
The Graduate School, Stony Brook University: Stony Brook, NY.
Format
application/pdf
Abstract
Electronics operate at cryogenic temperature are drawing more and more attention in recent years in both aerospace area and high energy physics area. Better noise performance of cryogenic electronics than electronics at room temperature makes it a great choice for high sensitivity detectors. While typical lifetime requirement for electronics is 20 years, whether cold electronics have the required lifetime in cryogenic environment is a critical question. With regards to lifetime, the major failure mechanisms such as negative bias temperature instability (NBTI), electromigration (EM), stress migration (SM), time-dependent dielectric breakdown (TDDB) and thermal cycling (TC) scale with temperature in favor of cryogenic operation. The only mechanism that affects the lifetime adversely at cryogenic temperature is the degradation due to Hot-Carrier Effect (HCE). In this dissertation, HCE is studied at both 300K and 77K. The mechanism of Hot Carrier Effect is discussed and its relationship with the degradation of major device parameters including transconductance, threshold voltage, subthreshold swing and mobility is investigated. Two different measurement strategies are adopted: accelerated lifetime measurement under severe electric field stress by large Vds while observing degradation in the transistor transconductance, and a separate measurement of the substrate current density as a function of 1/Vds before and after the stress test. The former verifies the canonical very steep slope of the inverse relation between the lifetime and the substrate current density, and the latter confirms that below a certain value of Vds a lifetime margin of several orders of magnitude can be achieved for the cold electronics TPC readout. The degradation of MOSFET noise due to HCE is studied at both 300K and 77K. A noise spectrum measurement system operates from 77K to 300K is designed. Measurements illustrate that PMOS exhibits a lower noise level as well as more resistant to HCE than NMOS. At both 300K and 77K, little influence of HCE on noise of PMOS can be observed makes it a good candidate as the input transistor of the pre-amplifier in the front-end ASIC which is a major noise contributor of the system. Design criteria for MOSFET based cryogenic electronics system with long lifetime and low noise degradation is proposed as a reference for circuit designers. | 75 pages
Recommended Citation
Ma, Jie, "Hot Carrier Study of MOSFET at 300K and 77K" (2015). Stony Brook Theses and Dissertations Collection, 2006-2020 (closed to submissions). 3291.
https://commons.library.stonybrook.edu/stony-brook-theses-and-dissertations-collection/3291