Type
Text
Type
Dissertation
Advisor
Stanacevic, Milutin | Doboli, Alex | Salman, Emre | Milder, Peter | Li, Xin.
Date
2016-12-01
Keywords
Analog circuit design automation, Causal information modeling, Design knowledge mining, Design verification, Topology synthesis | Electrical engineering
Department
Department of Electrical Engineering
Language
en_US
Source
This work is sponsored by the Stony Brook University Graduate School in compliance with the requirements for completion of degree.
Identifier
http://hdl.handle.net/11401/77440
Publisher
The Graduate School, Stony Brook University: Stony Brook, NY.
Format
application/pdf
Abstract
This thesis proposes novel approaches for analog circuit design knowledge mining and circuit causal information modeling. In particular, knowledge mining discovers and decomposes analog circuit design knowledge into three components: (1) a conceptual hierarchy for a group of circuit topologies, (2) circuits' performance capabilities (including trade-offs and bottlenecks), and (3) circuits' design causal reasoning strategies. Causal reasoning strategies lead to the development of reasoning-based topology synthesis and design verification, thus bring new perspective to existing approaches. Extended from performance capabilities, the thesis proposes circuit causal information modeling, which models relations of parameters deciding circuit performance attributes and coupling with other parameters. Different causal information measure reveals ordered parameter sequence and circuit sizing strategy. | 196 pages
Recommended Citation
Jiao, Fanshu, "Analog circuit design knowledge mining and circuit causal information modeling" (2016). Stony Brook Theses and Dissertations Collection, 2006-2020 (closed to submissions). 3255.
https://commons.library.stonybrook.edu/stony-brook-theses-and-dissertations-collection/3255